X-Git-Url: https://git.decadent.org.uk/gitweb/?p=exar-uart-driver.git;a=blobdiff_plain;f=vizzini.h;h=268d4bb52d695be03eeb316009f7e09f82217227;hp=9fe863805187b698cd451f82e2b3c88a053a3271;hb=3acd44efa3454690086590ea23f4f0d5f1b37e59;hpb=79dd567484a2540561ae1b132d7001551e6edb91

diff --git a/vizzini.h b/vizzini.h
index 9fe8638..268d4bb 100644
--- a/vizzini.h
+++ b/vizzini.h
@@ -195,12 +195,26 @@
  * Major and minor numbers.
  */
 
-#define XR21V141X_TTY_MINORS		32
+#define ACM_TTY_MAJOR		166
+#define ACM_TTY_MINORS		256
+
+/*
+ * Requests.
+ */
 
 #define USB_RT_ACM		(USB_TYPE_CLASS | USB_RECIP_INTERFACE)
 
+/*
+ * Output control lines.
+ */
+
 #define ACM_CTRL_DTR		0x01
 #define ACM_CTRL_RTS		0x02
+
+/*
+ * Input control lines and line errors.
+ */
+
 #define ACM_CTRL_DCD		0x01
 #define ACM_CTRL_DSR		0x02
 #define ACM_CTRL_BRK		0x04
@@ -214,27 +228,35 @@
  * Internal driver structures.
  */
 
+/*
+ * The only reason to have several buffers is to accommodate assumptions
+ * in line disciplines. They ask for empty space amount, receive our URB size,
+ * and proceed to issue several 1-character writes, assuming they will fit.
+ * The very first write takes a complete URB. Fortunately, this only happens
+ * when processing onlcr, so we only need 2 buffers. These values must be
+ * powers of 2.
+ */
 #define ACM_NW  16
 #define ACM_NR  16
 
-struct xr21v141x_wb {
+struct acm_wb {
 	unsigned char *buf;
 	dma_addr_t dmah;
 	int len;
 	int use;
 	struct urb		*urb;
-	struct xr21v141x	*instance;
+	struct acm		*instance;
 };
 
-struct xr21v141x_rb {
+struct acm_rb {
 	int			size;
 	unsigned char		*base;
 	dma_addr_t		dma;
 	int			index;
-	struct xr21v141x	*instance;
+	struct acm		*instance;
 };
 
-struct xr21v141x {
+struct acm {
 	struct usb_device *dev;				/* the corresponding usb device */
 	struct usb_interface *control;			/* control interface */
 	struct usb_interface *data;			/* data interface */
@@ -245,10 +267,10 @@ struct xr21v141x {
 	u8 *country_codes;				/* country codes from device */
 	unsigned int country_code_size;			/* size of this buffer */
 	unsigned int country_rel_date;			/* release date of version */
-	struct xr21v141x_wb wb[ACM_NW];
+	struct acm_wb wb[ACM_NW];
 	unsigned long read_urbs_free;
 	struct urb *read_urbs[ACM_NR];
-	struct xr21v141x_rb read_buffers[ACM_NR];
+	struct acm_rb read_buffers[ACM_NR];
 	int rx_buflimit;
 	int rx_endpoint;
 	spinlock_t read_lock;
@@ -261,6 +283,9 @@ struct xr21v141x {
 	struct work_struct work;			/* work queue entry for line discipline waking up */
 	unsigned int ctrlin;				/* input control lines (DCD, DSR, RI, break, overruns) */
 	unsigned int ctrlout;				/* output control lines (DTR, RTS) */
+	struct async_icount iocount;			/* counters for control line changes */
+	struct async_icount oldcount;			/* for comparison of counter */
+	wait_queue_head_t wioctl;			/* for ioctl */
 	unsigned int writesize;				/* max packet size for the output bulk endpoint */
 	unsigned int readsize,ctrlsize;			/* buffer sizes for freeing */
 	unsigned int minor;				/* acm minor number */
@@ -272,8 +297,9 @@ struct xr21v141x {
 	unsigned int throttled:1;			/* actually throttled */
 	unsigned int throttle_req:1;			/* throttle requested */
 	u8 bInterval;
-	struct xr21v141x_wb *delayed_wb;			/* write queued for a device about to be woken
- */
+	struct usb_anchor delayed;			/* writes queued for a device about to be woken */
+	unsigned long quirks;
+
         int           block;
         int           preciseflags; /* USB: wide mode, TTY: flags per character */
         int           trans9;   /* USB: wide mode, serial 9N1 */
@@ -285,11 +311,14 @@ struct xr21v141x {
 };
 
 #define CDC_DATA_INTERFACE_TYPE	0x0a
+
 /* constants describing various quirks and errors */
-#define NO_UNION_NORMAL			1
-#define SINGLE_RX_URB			2
-#define NO_CAP_LINE			4
-#define NOT_A_MODEM			8
-#define NO_DATA_INTERFACE		16
+#define NO_UNION_NORMAL			BIT(0)
+#define SINGLE_RX_URB			BIT(1)
+#define NO_CAP_LINE			BIT(2)
+#define NO_DATA_INTERFACE		BIT(4)
+#define IGNORE_DEVICE			BIT(5)
+#define QUIRK_CONTROL_LINE_STATE	BIT(6)
+#define CLEAR_HALT_CONDITIONS		BIT(7)
 
 #endif /*VIZZINI_H*/